The big challenge thus far has been making x86 virtualization happen at all. Architecturally, the platform was never designed to support multiple OSes concurrently, meaning virtualization vendors were forced to overcome both hardware and software limitations to allocate and manage processor, memory and I/O resources. VMware has traditionally dominated this space, not only because it was first, but because it was able to overcome these hardware issues while providing a workable management environment for handling the problems inherent in large-scale virtualization.
Now that virtualization features in next-generation Intel and AMD processors are paving the way for efficient, hypervisor-based virtualization of x86 systems, the emphasis can shift to making the process reliable and efficient. Though based on different approaches, choosing among hypervisor technologies from VMware, Microsoft and the open-source Xen may be less crucial than addressing the management challenges presented by large-scale virtualization. Eventually, the real market winners will be vendors that offer the best capabilities for translating our physical environment into a more productive virtual one. But first, we'll need a little help from our friends, the processor vendors.
In a normal x86 operating environment, the OS runs at protected ring 0. In virtualization without processor-assist, ring 0 is instead needed to run the VMM (virtual machine monitor) or hypervisor to manage hardware resources for VMs and their VOSes (virtual OSes). The challenge, then, for CPU virtualization was finding a way to make the OS function properly in a location other than ring 0. To solve this problem, chip-assisted virtualization creates a new, super-privileged and protected ring -1 for the VMM. This new location will allow VOSes to peacefully coexist in ring 0 with redirected communications to ring -1, without knowing that they share physical resources with other OSes on the same system.