Cavium's XPliant Paves Way For Multi-Purpose Ethernet Switches

New chip architecture provides the flexibility that's essential for emerging OpenFlow and overlay networks.

Greg Ferro

October 9, 2014

4 Min Read
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The current generation of merchant silicon for Ethernet switches uses static packet pipelines for low-cost design and manufacture, which works well for static networks. However, the rapid emergence of OpenFlow and overlay networking is driving a new generation of chips that use a programmable fabric to meet multiple use cases depending on the software.  

This trend is illustrated by Cavium's acquisition of XPliant to create new multi-purpose silicon for networking switches. The new silicon will further reduce barriers for new entrants in the Ethernet switch market and put competitive pressure on the incumbent vendors. The flexibility of the XPliant architecture could allow a single hardware platform with different software being used for cloud, campus, and data center needs.

Speeds and feeds
The XPliant silicon has the necessary speeds and feeds. It handles up 128 x 25G I/O channels and allows for any combination of 10G, 25G, 40G, 50G, and 100G physical interfaces. (It's common for switch silicon to have different I/O speeds to the physical interface speeds, and a 25GbE I/O on the switch crossbar can be used at 10GbE)

Consider that a configuration of 48 x 25GbE + 12 x 100GbE would suitable for high-speed non-blocking fabric for the most demanding of ECMP networking designs and still have spare capacity. Vendors with long development and support cycles will appreciate this capability for their software longevity.

So this chip is well suited to 1RU and mid-plane chassis architectures in terms of density and speed. The next challenge is software.

APIs and software support
Vendors are required to update or develop an operating system in order to use the XPliant XPA API, and have a strong incentive to do so. The XPliant architecture has a flexible silicon pipeline that is well suited for multiple uses such as static networking, OpenFlow, and overlay networking. This means that vendors can manufacture a single physical switch for many different customers needs by changing the operating system itself.

Fixed pipelines
The current generation of commodity Ethernet silicon is based on static packet pipelines in the internal silicon, where a packet is received on an interface and moves through a predefined set of functions within the silicon. Each step is handled by dedicated silicon and "baked" into the chip. The result is a simply designed, easy-to-manufacture and low-cost silicon chip that's widely used in the market.

The pipeline process moves through Ingress -> L2 -> L3 -> L4 -> Egress process.

Figure 1:

Why flexible pipelines matter
Two key technologies driving the next generation of Ethernet switch design (and sales) are overlay networking and OpenFlow.

In overlay networking, there is a primary requirement to bridge from the overlay to the underlay so that overlay hosts have low-latency, high-bandwidth connectivity to existing services in the data center LAN. Other requirements are  support for multiple overlay protocols; VXLAN is being extended and GENEVE is emerging while others like Microsoft's NVGRE remain in the market.

This overlay network diversity creates a market opportunity for bridging overlay networks together. Where Cisco has developed custom silicon for Nexus 9000 in ACI, other vendors could use Cavium and the programmable nature of the XPA chip to achieve the same outcome.

In the use case where is a VXLAN frame is received, a static pipeline can deliver. The L2 processing engine will strip the VXLAN header and then identify the internal Ethernet/VLAN header. Thus, terminating VXLAN overlay to VLAN is simple. However, stripping VXLAN IP/Ethernet headers and performing re-encapsulation into, say, Geneve is not possible with the common Broadcom Trident II silicon. In addition, the static pipeline doesn't work when L2-L3-L2 functions are needed for tasks like MLAG or VXLAN routing.

The key to the XPliant architecture is the Packet Rewrite function as shown in the following diagram:

Figure 2:

This flexibility allows for repeated packet handling to meet the uncertain future of packet forwarding.

Merchant silicon and market impact
Cavium is a recognized silicon maker and joins Intel, Marvel and Broadcom with switch silicon. There is growing interest in merchant silicon from networking vendors, but the lack of flexibility in the current generation of Broadcom Trident chips has prevented some SDN and overlay technologies.

Programmable switch silicon impacts the market in several ways. First, it allows  implementation of a wider range of new features with software upgrades, which changes the pipeline to meet new customer requirements.

Second, the same switch hardware can be used for OpenFlow, overlay or static networking according to the device operating system. This drives more focus onto the device operating system and the software features.

Finally, vendors could manufacture fewer physical products, which reduces warehouse and inventory costs while offering customers greater hardware flexibility.

The rise of merchant silicon continues to change the networking market and this flexible pipeline from Cavium look like a major step forward for the industry.

About the Author(s)

Greg Ferro

Network Architect & Blogger

Greg has nearly 30 years of experience as an IT infrastructure engineer and has been focused on data networking for about 20, including 12 years as Cisco CCIE. He has worked in Asia and Europe as a network engineer and architect for a wide range of large and small firms in many verticals. He has been writing about networking for more than 20 years and in the media since 2001.

You canemail Gregor follow him on Twitter as@etherealmind. He also writes the technical blogEtherealmind.comand hosts a weekly podcast on data networking atPacket Pushers.

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