Intel Expected To Follow AMD's CPU Integration
Intel Corp. is expected to follow a path pioneered by rival Advanced Micro Devices Inc. with the integration of the company's memory controller and high-speed interconnect onto its Xeon and
November 29, 2004
San Jose, Calif. — Intel Corp. is expected to follow a path pioneered by rival Advanced Micro Devices Inc. with the integration of the company's memory controller and high-speed interconnect onto its Xeon and Itanium server processors.
The integrated processors are expected to help bring the two Intel CPU architectures into price parity and create a relatively streamlined yet powerful all-serial server chip complex. But the shift is not expected to come until 2007, sources said. The move comes as server makers are crunching through cost and power issues with a new serial memory link proposed by Intel.
"Intel has been dropping hints in various places" about the plan, said one source with a top computer maker, who asked not to be named. "If you are aware of their intention, you can see what to look for," he added. Intel was not available for comment at press time.
In presentations at the Intel Developer Forum in September, the company talked about interconnect becoming "serial everywhere." The company is already shipping chip sets using the PCI Express 2.5-Gbit/second serial I/O technology. It is laying the groundwork for a fast serial interconnect to memory with its concept for fully buffered dual-in-line memory modules (FB-DIMMs), leaving the processor bus as the last link in the chain.
The I/O rates of those chip-to-chip interconnects could be hitting data rates of up to 6 Gbits/s by the time Intel launches the processors. The PCI Special Interest Group will meet in December to consider whether to take the next generation of PCI Express to 5 or 6 Gbits/s.To an extent, Intel will be playing catch-up with AMD, which launched its Opteron processor with an integrated memory controller in 2000. However, Opteron uses the parallel HyperTransport interface, whereas Intel will use a serial interconnect.
Besides boosting the performance and simplifying the design of Intel-based servers, the plan also aims to give the fledgling Itanium architecture a market boost. Intel began co-developing Itanium with Hewlett-Packard Co. in 1994 as a follow-on to X86 processors.
Last February, then-Intel CEO Craig Barrett said Intel had sold about 110,00 Itanium CPUs in 2003 — a far cry from its 100-plus million-unit per year X86 sales. With the launch of 64-bit X86 chips this year, Intel is re-positioning Itanium as generally aimed at servers using four or more processors.
Parity in pricing
As part of its effort to establish Itanium, Intel said it would bring the two architectures into price parity by 2007. "One way to do that is to use common parts such as memory controllers and systems interfaces," said the source. Indeed, the 2007 version of Itanium is the first member of the CPU family in several generations slated for a refreshed systems interface.
"To bring the memory controller on board is a major change, but I believe they will go that way in 2007," said Nathan Brookwood, a market watcher with Insight64 (Saratoga, Calif.). "However, if the Itanium gets put into a niche as being a very high-end processor, having a common systems interconnect with Xeon will be less relevant," he added.The new server CPUs should debut about the same time systems makers crank out a second generation of PC servers using the so-called fully buffered DIMMs. FB-DIMMs use a fast serial interconnect and a controller on each DIMM. The result is an increase in memory density in servers beyond what is supported by today's DDR-2 chips and lower pin counts.
The FB-DIMMs could add as much as $350 in costs and 65 watts of power consumption to a high-end Intel server, said Thomas Lagatta, vice president of the enterprise computing group of Broadcom Corp. "The architecture Intel has been selling is running out of gas," said Lagatta.
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