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Tripping On Power: Page 7 of 14

Last year, both AMD and Intel made the pivotal announcement that they would begin building multicore CPUs. While Intel's dual-core Xeons are initially heading for desktop systems, the company will be producing dual-core Itanium and server-appropriate Xeon chips later this year or early next. AMD is pursuing the opposite path, shipping dual-core Opterons intended for multiprocessor systems now, with dual-core Athlon chips due out later.

On the power budget front, both Intel and AMD say their new dual-core chips will draw no more power than their single-core predecessors. To achieve this bit of magic, both companies lowered the CPU clock rate by about 20 percent. So while dual-core systems won't yield double the performance, they'll result in a substantial performance boost without needing more power. Most server manufacturers are planning systems based on the dual-core chip. Sun Microsystems has been planning support from the outset and permits its Sun Fire servers to be field-upgraded to use AMD's new dual-core chips.

Intel's claims for the new Itanium dual-core chip are even grander. Because of its enhanced parallel processing capability, the 1.72 billion-transistor Montecito chip will boast 2.9 times the performance of its single-core ancestor--all while running at the same clock speed, but consuming about 25 percent less power. Intel accomplishes this counterintuitive feat with a new technology called Foxton.

Announced in February, Foxton is essentially Intel's SpeedStep technology on steroids. SpeedStep is the technology behind the radical drop in power consumption by Intel's mobile Pentium chips. Intel recently introduced Enhanced Intel SpeedStep for its higher-clock-speed Xeon chips. Where SpeedStep decreased processor speed and voltage together, Enhanced Intel SpeedStep allows for the two parameters to be adjusted independently.

Formerly known as Demand-Based Switching, Foxton takes Enhanced Intel SpeedStep up a notch by allowing voltage to be adjusted in 32 increments, and clock frequency in 64. Decoupling voltage and clock speed transitions allows each to be done more quickly and more strategically. The processor can dynamically change these parameters based on the instructions being executed.