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Tripping On Power: Page 6 of 14

While there are certainly ways to meet almost any cooling requirement, it makes sense to conserve power to the extent possible. That rack of HP blade servers will run up a yearly electrical bill of between $13,000 and $26,000 depending on locality--and that's just for the IT gear. The cooling system will also suck up about half that same amount of electricity. Over a three-year useful life, electricity can easily be the most costly part of running this rack of gear. Luckily, Intel and AMD finally understand that power consumption in data centers is an issue.

There are essentially three things that CPU designers can do to decrease power demand without sacrificing performance. One very effective measure is to reduce the size of the transistor gates. Moving from a 130nm fabrication process to a 90nm one reduced the Itanium 2's power budget by about 25 percent. AMD did at least as well with its move to 90nm.

Of course, if simple power reduction is really what you're after, CPU designers would need to resist the temptation to use the reduced transistor size to pack more transistors on a chip. They'd also need to leave the clock rate where it is. These two things almost never happen, but still, smaller is better. The roadmap for integrated circuit fabrication processes calls for 65nm and eventually 35nm. Intel and AMD will likely use these new processes to further enhance performance and advance their multicore plans. It's fair to say, however, that both realize that chip power budgets will remain approximately where they are--in the neighborhood of 100W per chip.

GOOD TO THE CORE