Throughput gains for NICs with TOEs can be dramatic. 3Com's 3C996-T 10/100/1000 PCI-X Server NIC with basic checksum processing and interrupt coalescing can sustain bidirectional throughput of 300 Mbps to 900 Mbps. A NIC capable of higher-level TCP/IP processing, such as Alacritech's 1000x1 Server and Storage Accelerator, can reach bidirectional throughput speeds of 1,500 Mbps to 1,800 Mbps while reducing host CPU utilization (see "Alacritech's 1000x1 Server and Storage Accelerator Is a SLIC NIC").
TOEs are distinguished by their full or partial off-load solutions. Full off-load solutions, such as Adaptec's ANA-7711 TCP/IP Offload Adapter, remove all TCP/IP protocol processing from the host to the NIC. If your environment has intermittent connection establishment and termination and is prone to dropped packets, a full off-load solution would be best. A partial off-load solution, such as Alacritech's 1000x1, automatically off-loads the data transmission/reception information or data path to the NIC while the host TCP/IP stack retains the responsibility for connection establishment and termination and error handling. If your network uses fiber optic media, has little problem with dropped packets and maintains connections for long periods, look to a partial off-load solution.
TOEs can be implemented in discrete component architecture using off-the-shelf computer components or in a specialized ASIC. Discrete component TOEs are constructed using a circuit board and off-the-shelf computer parts--a network processor or microprocessor, firmware, memory, data transfer bus, a RTOS (real-time operating system) and a PHY/ MAC interface. The protocol processing usually done by the host CPU is off-loaded to the embedded TCP/IP protocol stack in the RTOS.
The advantage of building board-level solutions for TOEs is flexibility. Individual compon- ents can be changed and firmware can be updated in the ROM chip. You can modify the TCP/IP stack with a firmware upgrade and tune it for special processing environments.