Howard Marks

Network Computing Blogger

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Where the Cloud Touches Down: Simplifying Data Center Infrastructure Management

Thursday, July 25, 2013
10:00 AM PT/1:00 PM ET

In most data centers, DCIM rests on a shaky foundation of manual record keeping and scattered documentation. OpManager replaces data center documentation with a single repository for data, QRCodes for asset tracking, accurate 3D mapping of asset locations, and a configuration management database (CMDB). In this webcast, sponsored by ManageEngine, you will see how a real-world datacenter mapping stored in racktables gets imported into OpManager, which then provides a 3D visualization of where assets actually are. You'll also see how the QR Code generator helps you make the link between real assets and the monitoring world, and how the layered CMDB provides a single point of view for all your configuration data.

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Thursday, August 8, 2013
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This webinar will help attendees understand the overall concept of SDN and its benefits, describe the different conceptual approaches to SDN, and examine the various technologies, both proprietary and open source, that are emerging. It will also help users decide whether SDN makes sense in their environment, and outline the first steps IT can take for testing SDN technologies.

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SSDs And The Write Endurance Boogeyman

A drawback of flash-based SSDs is their limited write endurance. In my previous blog I looked at how, at first glance, the limited write endurance of flash-based SSDs might cause problems for RAID-based data protection systems. The idea is that multiple SSDs with the same write endurance rating could, theoretically, fail at the same time and cause data loss. I don't think it's a significant concern. I'll take a closer look at flash write endurance and how it causes SSD wear to show you why.

A flash cell is controlled by a floating gate that is surrounded by two layers of silicon oxide dielectric, or insulating layers. As high voltage is applied to a flash page to erase the page, the charge in the cell tunnels through the dielectric layer, which causes some damage.

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Over time, the dielectric layer will either refuse to allow the tunnel, and the bit will stick as a 0 or a lattice disruption from the high voltage will short the oxide and the cell will fail to program and be stuck in the 1 state.

The rate at which cell failures occur varies based on the flash technology. SLC flash is typically rated at 100,000 write-erase cycles, MLC at 10,000 and eMLC at 30,000.

[SSDs have a variety of storage uses, including supporting VDI performance. Find out how in "Solving VDI Problems With SSDs and Data Deduplication."]

These vendor ratings fall somewhere in between minimum guarantees and stated MTBF (mean time between failures) actually representing something like a 1st or 5th percentile failure number. That is, at the rated number of write-erase cycles, some small percentage of the cells on the chip will have failed, and the rate at which failures will occur through further write-erase cycles is great enough that the vendor suggests you not count on the flash any further.

Intel, Micron and Toshiba are like Nissan or Ford when it comes to SSDs. When they say the timing belt in your car will last 60,000 miles, or the flash will last through 30,000 write-erase cycles, they're not saying it will break at 61,000. They are saying it could break, or fail to hold new data, at that point. Most will last longer, but I wouldn't want to be the guy that finds out exactly how much longer during rush hour on the Brooklyn-Queens Expressway.

That said, flash devices don't hit their magic endurance numbers and kick the bucket. As flash ages, the error rate for writing data to each page increases as the cells in that page fail. Flash controllers have ECC and DSP technologies built in to handle individual cell failures; as long as the number of failed cells in a page is low, the controller can just correct the errors and use the page.

Eventually, the error rate rises to the point that the flash controller is no longer confident it's getting the right data, so the controller marks that page as bad.

Because a typical enterprise SSD will be overprovisioned, allowing user access to 200GB of its 256GB or more of flash, a moderate number of failed pages just reduces the amount of overprovisioned flash the controller can use for housekeeping. This might affect performance but won't cause the SSD as a whole to fail. Only when the pool of overprovisioned flash is used up replacing bad pages does the SSD fail, and even then the data it holds is still readable.

While today's semiconductor manufacturing processes are incredibly precise, when you're dealing with cell geometries of 20nm or less it's just not possible that every block, page and cell of an entire flash chip, let alone a batch of thousands, is exactly the same.

When the boffins at Toshiba or Micron say the oxide layer in their flash is 170 atoms thick, that's going to be an average. Some will be 150 and others 200, and as the oxide layers age some cells are going to fail earlier than others.

Actually testing flash devices to see just how variable the failures are would be destructive, take a long time and ultimately require a large number of chips to be destroyed, and I haven't seen any studies to show how variable the rate is. My discussions with flash, SSD and array vendors leads me to believe that it's variable enough that we don't have to worry about a second SSD wearing out while the first is rebuilding.

Consider also that SSDs rebuild five to 10 times faster than HDDs, and that unlike HDDs, new generations of SDDs get faster as well as bigger. When I put all these factors together, I think the near-simultaneous SDD wearout problem is a Bogeyman: big, really scary but ultimately not very real.

Does flash write endurance have you worried? Is it enough to keep you from adopting flash? I'd like to get your input. Use the comments section to share your feedback.

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