Re: Tom is talking about things he doesn't know about.
The assertion about code reduction for performance gains is quite correct. For example, Facebook's FBOSS operatiing system is specifically desgined to maximise throughput by focussing on removing packet drops across the switching ASIC at very high loads. This has been common and well known problem in branded solutions at Facebook and led to the Wedge hardware/FBOSS Software.
Pluribus Networks, and others, write their own device drivers for the silicon to improve performance for flow updates to the FIB in silicon.
The packet forwarding latency is only one measure of speed, consider TCAM table update speed, or buffer management on the VOQ, total goodput at 90% sustained load,or many other areas besides.
The commenters highlighting the ASIC performance might be taking an overly simplistic model of the internal architecure of a switch and making poor errors in judgement. The ASIC performance is determined by the total sum of the software that it runs, network processors, internal buffer management, and much more.
Consider that Intel x86 server performance is determined by a combination of the operating system, bus speed, memory class and speed, network adapter, and much more. A switch is also a collection of components that determine the overall performance of the unit.