Intel Unveils Plans to Dominate the Data Center
July 24, 2013
Intel is targeting the data center as an arena where it hopes to change its fortunes. The chip maker has endured rough times lately, including a disappointing earnings report that saw its stock price drop by over 5% in the following two days, an analyst call overshadowed by dirges about a PC market deteriorating faster than anyone anticipated, and the ongoing negative ramifications of being far too late to the mobile device party.
At a press event in San Francisco this week, Intel demonstrated it's no longer content with being a component-level arms merchant to IT equipment manufacturers. Instead, the company wants to be a significant force in driving the system architecture and technology direction of what some are now calling the software-defined data center.
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To start, Intel provided new details about its next-generation Atom C2000 product family, commonly known by their Avoton and Rangely code names. Both are server SoCs using the same microarchitecture and process node that Intel will repackage for tablets and smartphones, but will include features that servers require, such as support for up to 64 Gbytes of DDR3 ECC memory, a 64-bit x86 instruction set, virtualization (Intel VT) and integrated Ethernet NICs. The Atom line is Intel's answer to low-power ARM chips, both for servers and mobile devices.
The Atom C2000, which has been sampling to more than 50 OEMs since spring and is promised to be at production scale "soon,"will feature multiple configurations.
At the top end is an eight-core chip that's seven times faster and four times more efficient when measured by performance per watt than its Centeron predecessor, which was just announced in December.
[Sytem on a Chip (SoC) architectures could transform network equipment. Find out how in "Cavium SoCs Promise Fast, Cheap IT Hardware."]
But Intel isn't planning just to segment the new chips, which use the Atom Silvermont microarchitecture and the same 22nm, tri-gate process node the debuted on the Ivy Bridge Core CPUs, into multiple speed grades. It's also introducing a new product family called Rangely. Rangely adds advanced features such as crypto acceleration and packet processing modules from the Fulcrum acquisition that are specifically targeted for network appliances and applications.
With multiple SKUs that vary core counts and speeds for each product, Intel hopes the Atom SoCs will penetrate all areas of data center infrastructure, from micro servers to storage systems and network devices. Intel also updated the roadmap for next-generation Xeon and Atom products, code-named Broadwell and Denverton, based on its forthcoming 14-nm process technology scheduled for 2014 and later. Jason Waxman, VP and general manager of Intel's Cloud Platforms group, said the two product lines will finally be synced on the same process node for future product generations.
The other big news was Intel's announcement that it will build its first big-core Xeon SoC, integrating Broadwell cores, I/O processors and other subsystems using the 14-nm process. Intel released no technical details about the product, but Waxman said its performance and power envelope will slot between the Atom Denvertons and discrete Broadwell Xeons.
The chip maker also added substance to its rack-scale system architecture and data center vision, which I'll describe in a future column. It showed off two reference Open Compute rack-scale systems--one with three dual Xeon motherboards and another with 30 single Atom SoC microservers, each using a mezzanine card for shared I/O and power distribution.
Intel intends to play a leading role in defining next-generation data center architectures, and the company provided enough technical details to demonstrate that it's not just hollow marketing talk.
(Full disclosure, Intel paid for all travel expenses to the event.)
Given Intel's difficulties of late, do you think the company is taking the right steps to meet changing data center demands? Your comments are welcome.
Kurt Marko is an IT pro with broad experience, from chip design to IT systems.