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	Issue TOC Print full article Print this page Download as PDF E-Mail this URL Flame the author     In this article Introduction Dell Computer Corp. PowerEdge 6650 Other Products Reviewed How We Tested Meet the Xeon MP Online Only: Server Chips Ahoy! Report Card

The Xeon MP processor is Intel's latest model for the midrange server market. Among its features is HyperThreading, which was introduced in 2001. HyperThreading lets a single processor core execute two threads simultaneously. To the OS and the application, a single Xeon MP processor looks like two processors. In a normal multiprocessor environment, the multiprocessor-aware OS takes individual tasks from each application, called threads, and sends them to an available processor. For example, the machine can handle threads from Microsoft IIS and from Exchange at the same time.

Because each processor looks like two, the upper layers of the OS can remain the same and operate as if they were in a normal multiprocessor environment. The split from one physical processor to two virtual processors happens at the silicon level. Each virtual processor shares the execution resources of the single core and keeps track of which thread it is processing. Intel claims this resource sharing can increase processing power by as much as 40 percent. Intel does not claim, however, that HyperThreading is a replacement for multiple processors; it's a complementary technology designed to get the most out of each processor.

These chips also feature a three-level cache system, all integrated on the chip, for increased performance. The 8 KB, Level 1 execution trace cache can handle 12 kilobits of decoded instructions in program order. This cache helps reduce the time the processor spends recovering from incorrectly predicted branches in code. The 256-KB Level 2 cache segment, called the Advanced Transfer Cache, is considerably faster than the Intel Pentium III Xeon's L2 cache, and transfers 32 bytes of data with each clock cycle to the processor core. The object is to prevent idle clock cycles in the core. The L3 cache--either 512 KB or 1 MB--is tied to the system memory clock. It reduces memory latency by storing large data sets right on the processor chip.

This chip also includes Intel's latest iteration of Streaming SIMD (Single Instruction Multiple Data) Extensions, called SSE2. This technology provides special processor functions to reduce the number of instructions required for video and image processing and similar functions. The Xeon MP processor also sports the Rapid Execution Engine, which lets the system perform basic algorithmic functions in half a clock cycle, greatly reducing the time required for these functions.